Computer Architecture Answer Guide
Qualifying Exam Study Guide: Computer Organization and Architecture Computer Organization and Architecture - Study Guide Available Formats: 1. Note to Students This study guide contains a few sample questions that provide an indication of the skills that we expect you to demonstrate in the topic areas of computer organization and architecture. See the end of the document for a list of these skills, topics covered by this qualifying examination and suggested readings. In general, you should expect questions that address the listed skills in any of the listed topic areas. These topics are those covered by typical junior/senior/first-year-graduate courses on computer organization and architecture. A specific topic may or may not be covered by the undergraduate/graduate courses you took or by our COMP3350, COMP4300, or COMP7300. Nevertheless, you are still responsible for knowing this topic.
To become familiar with these topics, you are encouraged to read relevant chapters from the suggested book or any other books on computer organization and architecture. 2. Sample Questions Question 1. True or False? Assembly language identifiers are by default case insensitive. ( Answer: True) Question 2. True or False? When a program’s source code is modified, the source code does not need to be assembled and linked again before it can be executed with the changes.
( Answer: False) Question 3. Write an instruction that subtract val3 from EAX A. Sub val3, eax B. Sub eax, val3 C.
Subtract val3, eax D. Subtract eax, val3 ( Answer: B) Question 4. Which of the following is the implementation of AX = (-val2+BX)-val4 in assembly language? Mov ax, val2 neg ax add ax, bx sub ax, val4 B. Mov ax, val3 neg ax add ax, bx sub ax, val4 C. Mov ax, val2 neg ax add ax, bx add ax, val4 D. Mov ax, val2 add ax add ax, bx sub ax, val4 ( Answer: A) Question 5.
Which of the following state is FALSE? The LOOP instruction repeats a block of statements a specific number of times B.
JMP is a conditional transfer instruction C. Assembly language programs use conditional instructions to implement high-level statements such as IF statements and loops D. Each of the conditional statements involves a possible transfer of control (jump) to a different memory address ( Answer: B) Question 6. True or False? Moore's Law states that the performance improvement to be gained from using some faster mode of execution is limited by the fraction of the time the faster mode can be used.
( Answer: False) Question 7. True or False? The fundamental idea of instruction pipelining is to split the processing of a computer instruction into a series of independent steps, with storage at the end of each step. ( Answer: True) Question 8. CPU execution time for a program depends on the following except A. Process management B. Instruction count D.
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Clock cycle time ( Answer: A) Question 9. Data hazard solutions include the following approaches except A. Reordering B. Forwarding C. Predict ( Answer: D) Question 10. Given a four-stage scoreboard, what types of hazards must be detected during the read-operands stage?
Structural hazard B. WAW hazard C. RAW hazard D. No hazard ( Answer: C) 3. Suggeseted Books. Irvine, Kip R., Assembly Language for x86 Processors, 7th Edition. Pearson, 2014.
ISBN-13: 401 ISBN-10:,. Hennessy, J. L, and Patterson, D. A., Computer Architecture: A Quantitative Approach, 5th Edition. Morgan Kaufmann, 2011.
ISBN-13: 9728 ISBN-10: 012383872X 4. Skills. Describe methods used to encode standard data types to be stored and manipulated at the machine level.
Demonstrate the ability to program microprocessors in assembly language. Show how to make use of standard data structures (e.g., arrays) in computer memory and explain how these structures are accessed at the machine level. Learn the principles behind the design of modern computer systems. Understand the design of instruction sets. Learn pipelining techniques. Understand issues in hierarchical memory system design. Classify and describe parallel computer architectures 5.
Topics. Assembly language programming. Conditionals and integer arithmetic.
Data representation. Addressing and arithmetic. Strings and arrays. Principles of instruction set design. Computer arithmetic. Pipelining. Memory hierarchy.
Autonomous I/O. Quantitative characterizations of CPU.
Memory and I/O performance.
There are situations, called hazards, that prevent the next instruction in the instruction stream from executing during its designated clock cycle. Hazards reduce the performance from the ideal speedup gained by pipelining.
There are three classes of Hazards: 1. Structural Hazards: It arise from resource conflicts when the hardware cannot support all possible combinations of instructions simultaniously in ovelapped execution.
Data Hazards: It arise when an instruction depends on the results of previous instruction in a way that is exposed by the ovelapping of instructions in the pipeline. Control Hazards: It arise from the pipelining of branches and other instructions that change the PC. How to Avoid Hazards: 1. Structural Hazard: This arise when some functional unit is not fully pipelined. Then the sequence of instructions using that unpipelined unit cannot proceed at the rate of one one per clock cycle. Another common way that it may appear is when some resources are not duplicated enough to allow all combination of instructional the pipeline to execute. So by fully pipe lining the stages and duplicating resources will avoid structural pipeline.
Application Architecture Guide
It turns out that caching is an important computer-science process that appears on every computer in a variety of forms. There are memory caches, hardware and software disk caches, page caches and more. Virtual memory is even a form of caching. Caching is a technology based on the memory subsystem of your computer. The main purpose of a cache is to accelerate your computer while keeping the price of the computer low.
Caching allows you to do your computer tasks more rapidly. Cache technology is the use of a faster but smaller memory type to accelerate a slower but larger memory type.
Computer Architecture Tutorial
A cache has some maximum size that is much smaller than the larger storage area. It is possible to have multiple layers of cache. A computer is a machine in which we measure time in very small increments. When the microprocessor accesses the main memory (RAM), it does it in about 60 nanoseconds (60 billionths of a second). That's pretty fast, but it is much slower than the typical microprocessor.
Microprocessors can have cycle times as short as 2 nanoseconds, so to a microprocessor 60 nanoseconds seems like an eternity.